Designers of broadband receivers face several challenges today. One such challenge is presented by the very nature of broadband receivers. That is, in many of the communications systems of today, receivers are required to digitize incoming signals over a broad frequency range. These signals may have a very large dynamic range (i.e., power levels can vary greatly). For the purpose of this discussion, the term “power level” is used broadly to refer to either the amount of power in a particular frequency band (i.e., power density) or the amount of power over the entire band used by the particular received signal (i.e., total signal power). In addition, a “signal” is defined as the energy within a frequency band that is used to represent information (i.e., “content”) being communicated from a transmission source to the receiver. Accordingly, a receiver may receive several signals, some such signals from the same transmission source, each such signal using a different frequency band, and some such signals from different transmission sources using different frequency bands.
FIG. 1 is a simplified block diagram of a typical receiver 100. A low noise amplifier (LNA) 102 initially receives the incoming signals. The LNA 102 amplifies the signals. The output from the LNA 102 is the coupled to an input of an automatic gain control (AGC) circuit 103. The AGC circuit 103 attempts to ensure that the power of the incoming signal remains essentially constant for incoming signals of varying power levels. It is common today for such AGC circuits to drive the incoming signal to the highest level possible without causing distortion due to clipping of the signal.
The output of the ACG circuit 103 is coupled to the input of a set of analog filters 104. These analog filters 104 ensure that energy outside the desired frequency band is removed before further processing of the signals. The filtered signals are then output from the analog filters 104 to an analog to digital converter (ADC) 106. The ADC 106 takes the received filtered analog signals and generates a digital representation of these received signals. The digital representation of the analog input takes the form of a series of digital values that each indicate the amplitude of the analog signal at a particular point in time. The combination of the LNA 102, the AGC circuit 103, the analog filters 104 and the ADC 106 comprise the receiver front end 109.
The digital output from the ADC 106 is then coupled to a Receive (RX) processor 108. The Receiver Processor 108 performs whatever processing is desired for the received signals. For example, the Receiver Processor 108 might process the signals to extract viewable video content and prepare that content for display on a monitor (not shown).
One problem that arises comes from the fact that unexpected bursts of interference can occur that will drive the output of the AGC to a level that will exceed the capability of the ADC. That is, the output of the ADC will be compressed, since the ADC will hit full scale before the signal at the input of the ADC has reached its highest level. Accordingly, the ADC will output the same erroneous value (i.e., the full scale value) for each input above that level that initially reaches the full scale value. This is commonly referred to as “clipping” and causes errors in data transmission. For example in networks that conform to the well-known Multimedia of Coax Alliance (MoCA) standard, a burst interference that drives the ADC into clipping will result in data packet errors. Such a burst interference may be caused by adjacent channel activity or off-air interference from cell or LTE (Long Term Evolution) phones.
The AGC is designed to drive the input to the ADC 106 as close to full scale as possible. In some cases, headroom is designed into the ACG circuit 103 to ensure that there is some safety margin (i.e., a “backoff’ or “headroom”) between the full scale value at the output of the ADC 106 and the value that is output by the strongest received signal. Most signals have the peak power exceeding the average power. The minimum headroom needs to be sufficient to accommodate the peak power. Typically, a fixed amount of backoff is provided to deal with the worst case, to account for unit to unit variability, temperature and other factors. Therefore, the AGC provides less gain than is desirable in some cases, but more gain in others. If the selection of what is “worst case” is made too aggressively, then it is more likely that from time to time, an interfering signal will cause clipping in the ADC 106. However, if a more conservative approach is taken, the likelihood is that for the majority of the time, the front end will not be providing as much gain as would otherwise be desired.
In some cases, this can be dealt with by adjusting the modulation that is used and thus increasing the signal to noise ratio margin and so reducing the impact when interference is present. However, in many systems in use today, it is not possible to control the modulation sufficient rapidly to account for short bursts of interference. Furthermore, in some cases, the adjustments to the modulation are made based on an analysis of the signals that are made at discrete times. Interference might not be present during those discrete times. Therefore, the modulation will not be adjusted to account for the interference.
Further complicating the matter, in some cases receiver front end circuits use a variable power supply. In such cases, the amount of gain that is appropriate for one power supply output level will not be appropriate for another power supply output level.
Accordingly, there is presently a need for an receiver front end that can receive signals with a very large dynamic range and digitize them without compressing the large signals, while still maintaining a high resolution for weaker signals in the face of intermittent bursts of noise.